1. Field of the Invention
The present invention relates to silicon oxide films, their use in integrated circuit fabrication, and a method for forming a silicon oxide film.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of components (e. g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e. g., sub-micron dimensions), it has become increasingly common to employ trench isolation methods to electrically isolate adjoining active semiconductor regions of semiconductor substrates. For example, shallow trench isolation methods entail forming trench regions between the active semiconductor regions. The trench regions are typically less than about 2-3 microns deep and are filled with a dielectric material.
Silicon oxide films have been suggested for use as the dielectric material for shallow trench isolation methods, since silicon oxides are good insulating materials. Silicon oxide films may be formed using chemical vapor deposition (CVD) processes. For example, silicon dioxide may be formed by reacting tetra-ethyl-ortho-silicate (TEOS) with ozone (O3). Helium (He) or nitrogen (N2) are typically used as the carrier gas for the TEOS.
Depending on which TEOS carrier gas is used, silicon dioxide films made therewith have different properties (e. g., wet etch rate ratios (WERR), deposition rates, shrinkage, trench gap fill). For example, when helium (He) is used as the carrier gas for TEOS, silicon dioxide films having low wet etch rate ratios and low deposition rates are formed. However, when nitrogen (N2) is used as the TEOS carrier gas, silicon dioxide films having high wet etch rate ratios and low deposition rates are formed.
Thus, a need exists in the art for a method of forming silicon oxide films low wet etch rate ratios and high deposition rates.
A method for forming a silicon oxide layer for use in integrated circuit fabrication is provided. The silicon oxide layer is formed by reacting a first gas mixture and a second gas mixture. The first gas mixture comprises tetra-tehyl-ortho-silicate (TEOS), helium (He) and nitrogen (N2). The second gas mixture comprises ozone (O3) and optionally, oxygen (O2). The helium (He) and nitrogen (N2) in the first gas mixture preferably have a flow ratio of helium:nitrogen within a range of about 1:1 to about 1:3. Such flow ratios for the helium:nitrogen forms silicon oxide layers with increased deposition rates as well as improved wet etch rates without affecting the trench filling capabilities thereof.
The silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the silicon oxide layer is used as an insulating material for shallow trench isolation. For such an embodiment, a preferred process sequence includes providing a substrate having thereon, trench regions formed between active semiconductor regions. Thereafter, the trench regions are filled with a silicon oxide layer formed by reacting a first gas mixture comprising tetra-ethyl-ortho-silicate (TEOS), helium (He) and nitrogen (N2), with a second gas mixture comprising ozone (O3) and, optionally, oxygen (O2).